drivers: imx: imx_gpt: Add general purpose timer API binding
authorJun Nie <[email protected]>
Wed, 4 Jul 2018 07:51:20 +0000 (15:51 +0800)
committerBryan O'Donoghue <[email protected]>
Tue, 4 Sep 2018 10:52:15 +0000 (11:52 +0100)
Add delay timer API so that it can be called by delay timer
layer and used as delay timer globally.

[bod: changed name from imx_delay_timer -> imx_gpt ]

Signed-off-by: Jun Nie <[email protected]>
Reviewed-by: Bryan O'Donoghue <[email protected]>
Signed-off-by: Bryan O'Donoghue <[email protected]>
drivers/imx/timer/imx_gpt.c [new file with mode: 0644]
drivers/imx/timer/imx_gpt.h [new file with mode: 0644]

diff --git a/drivers/imx/timer/imx_gpt.c b/drivers/imx/timer/imx_gpt.c
new file mode 100644 (file)
index 0000000..bd364eb
--- /dev/null
@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <assert.h>
+#include <delay_timer.h>
+#include <mmio.h>
+#include <imx_gpt.h>
+
+#define GPTCR_SWR              BIT(15)         /* Software reset */
+#define GPTCR_24MEN            BIT(10)         /* Enable 24MHz clock input */
+#define GPTCR_CLKSOURCE_OSC    (5 << 6)        /* Clock source OSC */
+#define GPTCR_CLKSOURCE_MASK   (0x7 << 6)
+#define GPTCR_TEN              1               /* Timer enable */
+
+#define GPTPR_PRESCL_24M_SHIFT 12
+
+#define SYS_COUNTER_FREQ_IN_MHZ 3
+
+#define GPTPR_TIMER_CTRL       (imx_base_addr + 0x000)
+#define GPTPR_TIMER_PRESCL     (imx_base_addr + 0x004)
+#define GPTPR_TIMER_CNTR       (imx_base_addr + 0x024)
+
+static uintptr_t imx_base_addr;
+
+uint32_t imx_get_timer_value(void)
+{
+       return ~mmio_read_32(GPTPR_TIMER_CNTR);
+}
+
+static const timer_ops_t imx_gpt_ops = {
+       .get_timer_value        = imx_get_timer_value,
+       .clk_mult               = 1,
+       .clk_div                = SYS_COUNTER_FREQ_IN_MHZ,
+};
+
+void imx_gpt_ops_init(uintptr_t base_addr)
+{
+       int val;
+
+       assert(base_addr != 0);
+
+       imx_base_addr = base_addr;
+
+       /* setup GP Timer */
+       mmio_write_32(GPTPR_TIMER_CTRL, GPTCR_SWR);
+       mmio_write_32(GPTPR_TIMER_CTRL, 0);
+
+       /* get 3MHz from 24MHz */
+       mmio_write_32(GPTPR_TIMER_PRESCL, (7 << GPTPR_PRESCL_24M_SHIFT));
+
+       val = mmio_read_32(GPTPR_TIMER_CTRL);
+       val &= ~GPTCR_CLKSOURCE_MASK;
+       val |= GPTCR_24MEN | GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
+       mmio_write_32(GPTPR_TIMER_CTRL, val);
+
+       timer_init(&imx_gpt_ops);
+}
diff --git a/drivers/imx/timer/imx_gpt.h b/drivers/imx/timer/imx_gpt.h
new file mode 100644 (file)
index 0000000..6416c3c
--- /dev/null
@@ -0,0 +1,14 @@
+/*
+ * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef __IMX_GPT_H__
+#define __IMX_GPT_H__
+
+#include <stdint.h>
+
+void imx_gpt_ops_init(uintptr_t reg_base);
+
+#endif /* __IMX_GPT_H__ */